Using a description language such as a netlist and device models an analog circuit can be first designed in terms of its predetermined inputs and expected outputs. The analog circuit design is then simulated before it is physically fabricated on a silicon chip.
One of the most difficult challenges in analog circuit stimulation is the analysis of the circuits that operate on multiple time scales. Typical examples of this type of circuits are switched-capacitor filters and circuits used in RF (radio frequency) communications systems. Applying standard transient analysis to a circuit of this type requires simulation of the detailed responses of the circuit over hundreds of thousands of clock cycles (millions of time points).
Many circuits of engineering interest are designed to operate near a time-varying, but quasi-periodic, operating point. Some of these circuits can be analyzed under the assumption that one of the circuit inputs produces a periodic response that can be directly calculated by steady-state algorithms, thus avoiding long transient simulation times. Under this assumption, all other time-varying circuit inputs are treated as small-signal by linearizing the circuit around the periodic operating point.
Existing algorithms are able to find periodic operating points and to perform periodic time-varying small-signal analysis. However, many circuits cannot be analyzed with the periodic-operating-point-plus-small-signal approach, because the above-described assumption may not apply. For example, predicting intermodulation distortion of a narrowband circuit, such as a mixer-plus-filter circuit, involves calculating the nonlinear response of the mixer circuit, driven by an LO (local oscillator), to two high-frequency inputs that are closely spaced in frequency. The steady-state response of such a circuit is quasi-periodic.
The analog circuit simulation is further complicated by the fact that many multi-timescale circuits have a response (again mixers and switched-capacitor filters are typical examples) that is highly nonlinear with respect to at least one of the exciting inputs, and so steady-state approaches, such as the multi-frequency harmonic balance approach, do not perform well. To circumvent these difficulties, mixed frequency-time (MFT) algorithms have been proposed. Specifically, the MFT algorithms exploit the fact that many circuits of engineering interest have a strongly nonlinear response to only one input, such as the clock in the case of a switched-capacitor circuit, or local oscillator in the case of a mixer, but respond only in a weakly nonlinear manner to other inputs.
Unfortunately, existing MFT algorithms suffer from several drawbacks that prevent their application to practical circuits, particularly large circuits. In existing MFT algorithms, poor sample point selection leads to ill-conditioned simulation environment, in which simulation values may be unsolveable with acceptable accuracy. In addition, existing MFT algorithms are based on a matrix-explicit linear solver (via Gaussian elimination) whose computational cost (or time) is proportional to an order of N3 for each Newton iteration, where N is the number of nodes of the circuit in simulation.
A new class of algorithms have been developed for simulating multi-timescale circuits by converting the circuit DAE (differential-algebraic equation) into an equivalent multi-variable partial differential equations (M-PDE). However, the effectiveness of the M-PDE method to simulate large circuits has yet to be proven. In addition, there is evidence that, for some circuits, the M-PDE method generates inaccurate simulation results.
There is, therefore, a need in the art for a method and apparatus that utilizes the MFT method to accurately simulate large circuits.
There is another need in the art for a method and apparatus utilizing the MFT method to simulate large circuits with reduced computational cost and increased speed.
There is still another need in the art for a method and apparatus for generating an efficient linear problem solver structured such that the MFT method can accurately simulate large circuits with improved convergence.
The present invention provides a method and apparatus to meet these and other needs.